1. Field of the Invention
This invention relates to a fabrication process of substrate, and more specifically to a method of making multilayer substrate by build-up process.
2. Description of the Related Art
Currently, the methods for use in forming multilayer substrate by build-up process mainly comprise the conformal mask self-limited drilling process and the photo-via process.
FIGS. 1-5 illustrate major steps of fabrication of a multilayer substrate by the conformal mask self-limited drilling process. FIG. 1 shows an interlayer circuit board 100 with two layers of conductor circuits formed thereon. Referring to FIG. 2, two resin coated copper foils 110 are laminated on both sides of the interlayer circuit board 100 by conventional methods such as thermocompression. The resin coated copper foil 110 mainly comprises an insulating resin layer 110a and a copper foil 110b. Referring to FIG. 3, a photoresist layer 120 is formed over the surface of the copper foil 110b laminated on the both sides of the interlayer circuit board 100 using conventional techniques and materials, then imaged and developed. As is well-known, a photomask is used to image only certain area of the photoresist layer 120 which, when developed, are removed to leave predetermined portions of the copper foil 110b exposed. Then the exposed portions of the copper foil 110b are etched so as to form fine holes at predetermined positions thereof. Referring to FIG. 4, the remaining photoresist is removed and laser beams are applied to the insulating resin layer 110a exposed from the fine holes of the copper foil 110b. A plurality of laser pulses are used to remove the exposed resin layer 110a until parts of the conductor circuits of the interlayer circuit board 100 are exposed thereby forming via holes. It is noted that each laser pulse has a energy density per pulse that is greater than the ablation threshold of resin layer 110a and less than the ablation threshold of the copper foil 110b. Subsequently, referring to FIG. 5, a copper layer 130 is plated over the entire surface of the copper foil 110b (including the via holes) for electrically connecting the conductor circuits of the interlayer circuit board 100 to the copper foil 110b. Plating in this step is typically carried out by electroless copper plating. The copper layer 130 establishes electrical connections between the copper foil 110b, the via holes, and the conductor circuits of the interlayer circuit board 100. Finally, an etch resist is formed on the copper layer 130, and then the copper layer 130 is selectively etched to form outer layer circuits (not shown).
FIGS. 6-10 illustrate major steps of fabrication of a multilayer substrate by the photo-via process. As shown in FIG. 6, a photoimagable dielectric (PID) 210 is applied onto the interlayer circuit board 100 by conventional methods. Then, the PID 210 is imaged and developed to form photo vias 210a at predetermined positions thereof (see FIG. 7). After that, a through hole 220 is formed by mechanical drilling or laser drilling (see FIG. 8). Subsequently, referring to FIG. 9, a copper layer 230 is plated over the entire surface of the PID 210 (including the photo vias 210a and through hole 220). Finally, an etch resist is formed on the copper layer 230, and then the copper layer 230 is selectively etched to form outer layer circuits (not shown).
However, the aforementioned build-up methods both use photoimaging and developing techniques to form the blind vias. Due to errors originated in the photoimaging and developing process, it is quite easy to have misregistration problems during via formation.
The present invention therefore seeks to provide a multilayer substrate manufacturing method which overcomes, or at least reduces the above-mentioned problems of the prior art.
It is a primary object of the present invention to provide a process for producing a multilayer substrate wherein the via holes are directly formed by mechanical drilling or laser drilling instead of photoimaging and developing thereby simplifying the whole process and avoiding the misregistration problems due to errors originated in the photoimaging and developing process.
Accordingly, the present invention provides a method of making a multilayer substrate comprising: (a) providing an interlayer circuit board having conductor circuits thereon; (b) forming a dielectric layer on the interlayer circuit board; (c) mechanical drilling (or laser drilling) through the dielectric layer to the conductor circuits at predetermined positions thereof so as to form via holes; (d) electrolessly plating a conductive layer on the surface of the dielectric layer and the via holes; (e) forming an etch resist on the conductive layer, followed by formation of outer conductor circuits on the conductive layer by selectively etching; and (f) removing the etching resist.
Typically, the mechanical drilling (or laser drilling) has better accuracy, so the via holes are formed with better accuracy. Furthermore, since the via holes are formed by drilling instead of photoimaging and developing, the processing steps of the method in accordance with the present invention are minimized thereby significantly improving the production efficiency.